A nonvolatile memory such as a NAND flash has a reduced number of rewrites. For that reason, an information processing device managing the nonvolatile memory performs wear leveling control. Specifically, the information processing device counts the number of rewrites of the nonvolatile memory and stores it in a table. Then, with reference to a value stored in the table, the information processing device controls a writing position so that data are written on average to the whole storage area of the nonvolatile memory. Owing to performance of such wear leveling control, the information processing device can extend the life of the nonvolatile memory.
In recent years, high-speed nonvolatile memories, also called as storage class memories, have been developed. In the storage class memories, data is written in units of byte or in units of cache line. Therefore, in order to accurately perform wear leveling control, the information processing device needs to manage the number of rewrites in units of byte or in units of a cache memory. However, when the number of rewrites is managed in this way, the size of the table considerably increased, and the information processing device needs to include a very large memory.
While, for example, it is also considered to count the number of rewrites only in units of page, and not count the number of rewrites in units of byte or in units of a cache memory. However, when the number of rewrites is managed in such a way, the information processing device cannot distinguish between writing data into a different byte or into a different cache line within a page and writing data into the same byte or into the same cache line, and the wear leveling control cannot be achieved with high accuracy.